International Standards and Conformity Assessment for all electrical, electronic and related technologies

CLC/SR 93

Design automation (Disbanded)

 
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CLC/SR 93 Working Documents

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CLC/SR 93 Documents open for vote

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Other Documents accessible to CLC/SR 93

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Definitive Text - EN 61926-1:2000
Design automation - Part 1: Standard test language for all systems - Common abbreviated test language for all systems (C/ATLAS)
Definitive Text - ENV 50208-6:1997
Data Interchange format for Simulated and Measured Data (ISMD)
 
Definitive Text - EN 61691-3-2:2001
Behavioural languages - Part 3-2: Mathematical operation in VHDL
Definitive Text - EN 61523-2:2002
Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries
Definitive Text - EN 61691-2:2001
Behavioural languages - Part 2: VHDL multilogic system for model interoperability
Definitive Text - EN 61690-1:2000
Electronic Design Interchange Format (EDIF) - Part 1: Version 3 0 0
Definitive Text - EN 62014-1:2002
Electronic design automation libraries - Part 1: Input/Output buffer information specifications (IBIS version 3.2)
Definitive Text - EN 61523-1:2002
Delay and power calculation standards - Part 1: Integrated circuit delay and power calculation systems
Definitive Text - EN 61691-3-3:2001
Behavioural languages - Part 3-3: Synthesis in VHDL
Definitive Text - EN 61690-2:2000
Electronic Design Interchange Format (EDIF) - Part 2: Version 4 0 0

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